Industrie Flashspeicher

DOM USB 32GB pSLC

Mozaïk Storage Ref. : PMS-4124

Die Referenz SFUI032GJ1AE2TO-I-LT-2BP-STD aus der Produktreihe U-56 Series everbit des Herstellers Swissbit AG ist auch mit anderen Speicherkapazitäten und Temperaturbereichen erhältlich. Wir stehen Ihnen gerne zur Verfügung, um Ihre Fragen zu beantworten und Angebote zu erstellen. Zögern Sie nicht, uns zu kontaktieren:

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Beschreibung

HerstellerArt. : SFUI032GJ1AE2TO-I-LT-2BP-STD
Serie : U-56 Series everbit
Hersteller : Swissbit AG
Betriebstemp. : -40°C ~ +85°C
Form factor : 2.54mm pitch

Produktspezifikationen

Hersteller Swissbit AG
Herstellerartikelnummer SFUI032GJ1AE2TO-I-LT-2BP-STD
Unterkategorie DOM
Interface USB 2.0
Flashtype pSLC
Form factor 2.54mm pitch
Kapazität 32 GB
Lebensdauer in P/E Zyklen (max.) 20 000 P/E Zyklen
Lesegeschwindigkeit (max.) 175 MB/s
Schreibgeschwindigkeit (max.) 110 MB/s
TBW (max.) 651 TB
MTBF 3 000 000 Stunden
S.M.A.R.T. Funktionen Ja
PowerLossProtector Ja
Betriebstemperatur -40°C ~ +85°C
Lagertemperatur -40°C ~ +85°C
Chipset Industrial Grade
Betriebsspannung 3.3 V
5.0 V
Vibrationen 50G
Schocks 1500G
Zusätzliche Informationen USB3.1 solid state flash drive for internal 9(10)-pin USB connector terminal
Compliant with USB specification 3.1 Gen 1 (SuperSpeed
5Gb/s burst)
Backward compliant with USB 2.0/1.1 systems (High/Full Speed - 480/12Mb/s burst)
2.54mm or 2.00mm connector with keyed pin9
Mounting hole electrically not connected (optional grounded)
Fixed drive (USB hard drive - optional removable)
LED for operation indication
Write protect switch (optional)
Diagnostic features with Life Time Monitoring tool support
Firmware update in field possible
Up to 1100 IOPS write and 3200 IOPS read (4KByte transfers)
Up to 110 MBytes/s sequential write and 175 MBytes/s read speed
Power Supply: (Low-power CMOS technology)
3.1 to 5.5V operating voltage
Optimized FW algorithms especially for high read access and long data retention applications Patented power-off reliability technology
Near Miss ECC technology
Minimizes the risk of uncorrectable bit failure over the product life time. Each read command analyzes the ECC margin level and refreshes data if necessary.
Read Disturb Management
The read commands per block are monitored and the content is refreshed when critical levels are reached.
Wear Leveling technology
Equal wear leveling of static and dynamic data. The wear leveling assures that dynamic data as well as static data is balanced evenly across the memory. As a result
the maximum write endurance of the device is guaranteed.
Data Care Management
The interruptible background process maintains the user data integrity by compensating Read Disturb effects or Retention degradation due to high temperature effects.
UBER <10-16
High reliability
Pseudo SLC Flash with 20
000 Program/Erase Cycles and everbit Reduced Write Amplification Designed with sophisticated firmware architecture for industrial and NetCom market especially 24/7 application like networking - base
Zertifikate EMC/ CE / FCC / RoHS / WEEE/ REACh
Gewicht 5 g
Abmessungen 36.8mm x 26.65mm